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Summary: Data and Computation Transformations for Multiprocessors
Jennifer M. Anderson, Saman P. Amarasinghe and Monica S. Lam
Computer Systems Laboratory
Stanford University, CA 94305
Abstract
Effective memory hierarchy utilization is critical to the performance
of modern multiprocessor architectures. We havedeveloped the first
compiler system that fully automatically parallelizes sequential pro
grams and changes the original array layouts to improve memory
system performance. Our optimization algorithm consists of two
steps. The first step chooses the parallelization and computation
assignment such that synchronization and data sharing are mini
mized. The second step then restructures the layout of the data
in the shared address space with an algorithm that is based on a
new data transformation framework. We ran our compiler on a
set of application programs and measured their performance on the
Stanford DASH multiprocessor. Our results show that the compiler
can effectively optimize parallelism in conjunction with memory
subsystem performance.
1 Introduction
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