Summary: A Design Framework for Asynchronous Multithreaded Architectures
D. K. Arvind, J. Hossell, A. Koppe, T. Lewis, R. Rangaswami, J. Schneiders, A. Stanley and S. Zhong
Institute for Computing Systems Architecture, University of Edinburgh,
Mayfield Road, Edinburgh EH9 3JZ, Scotland.
Email: dka@dcs.ed.ac.uk
Abstract
This paper outlines a framework for the design of inte­
gration platforms for high­performance, low­power pro­
grammable systems for embedded applications. We seek
high performance by exploiting concurrency in the co­
operating threads in the application, and low power con­
sumption in the asynchronous implementation of the multi­
threaded platforms. Results are presented for the estimation
of power consumption and speed of simple C benchmark
programs executing on a micronet­based multithreaded ar­
chitecture which exercises the design flow in the framework.
1 The Design Framework
This framework (see Figure 1) addresses the challenge of
designing programmable, high­performance and low­power
embedded systems. The system is organised as a set of co­

Source: Arvind, D. K. - School of Informatics, University of Edinburgh

Collections: Computer Technologies and Information Sciences