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Efficient Pipelining of Nested Loops: Unroll-and-Squash
 

Summary: Efficient Pipelining of Nested Loops:
Unroll-and-Squash
Darin Petkov Randolph Harr Saman Amarasinghe
Massachusetts Institute of
Technology
darin_petkov@alum.mit.edu
Synopsys, Inc. Massachusetts Institute of
Technology
saman@lcs.mit.edu
Abstract
The size and complexity of current custom VLSI have
forced the use of high-level programming languages to
describe hardware, and compiler and synthesis technology
to map abstract designs into silicon. Since streaming data
processing in DSP applications is typically described by
loop constructs in a high-level language, loops are the
most critical portions of the hardware description and
special techniques are developed to optimally synthesize
them. In this paper, we introduce a new method for
mapping and pipelining nested loops efficiently into

  

Source: Amarasinghe, Saman - Computer Science and Artificial Intelligence Laboratory & Department of Electrical Engineering and Computer Science, Massachusetts Institute of Technology (MIT)

 

Collections: Computer Technologies and Information Sciences