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Summary: AreaOriented Synthesis for PassTransistor Logic \Lambda
Rajat Chaudhry TaiHung Liu Adnan Aziz
Electrical and Computer Engineering
The University of Texas, Austin
chaudhry,tlliu,adnan@ece.utexas.edu
Jeffrey L. Burns
IBM Austin Research Laboratory
IBM Corporation
jbl@austin.ibm.com
Abstract
Pass Transistor Logic (PTL) circuits have been successfully used
to implement digital ICs which are smaller, faster, and more en
ergy efficient that static CMOS implementations of the same de
signs. Thus far, most PTL implementations have been handcrafted;
as such, designer acceptance of PTL has been limited. In this
paper, we develop efficient algorithms for automated synthesis of
high quality PTL designs. Our approach is based on the use of Bi
nary Decision Diagrams (BDDs) to represent logic functions. We
present several BDD optimization techniques targeting minimum
area PTL implementations. We compare our results with prior work
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