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Improving Energy Efficiency of Asymmetric Chip Multithreaded Multiprocessors through Reduced OS Noise Scheduling
 

Summary: 1
Improving Energy Efficiency of Asymmetric Chip Multithreaded
Multiprocessors through Reduced OS Noise Scheduling
Ryan E. Grant Ahmad Afsahi1
Department of Electrical and Computer Engineering
Queen's University
Kingston, ON, Canada K7L 3N6
ryan.grant@ece.queensu.ca ahmad.afsahi@queensu.ca
Abstract
The performance of the emerging chip multithreaded symmetric multiprocessors (SMPs) is of
great importance to the high performance computing community. However, the growing power
consumption of such systems is of increasing concern, and techniques that can be used to
increase overall system power efficiency while sustaining performance are very desirable.
Operating system (OS) noise can have a dramatic effect on system performance. Effectively
handling the smaller operating system tasks while simultaneously preserving application thread
synchronicity leads to gains in overall system efficiency.
Recently, under a fixed power budget, asymmetric multiprocessors (AMP) have been
proposed to improve the performance of multithreaded applications. An AMP in this context is a
multiprocessor system in which its processors are not operating at the same frequency. This
paper proposes two simple scheduling methods that reduce the impact of OS noise, while

  

Source: Afsahi, Ahmad - Department of Electrical and Computer Engineering, Queen's University (Kingston)

 

Collections: Computer Technologies and Information Sciences