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IMTC 2006 Instrumentation and Measurement Technology Conference
 

Summary: IMTC 2006 Instrumentation and Measurement
Technology Conference
Sorrento, Italy 24-27 April 2006
Statistical Characterization of Partially-Depleted SOI Gates
Kyung Ki Kim, Yong-Bin Kim, N. Park*, and F. Lombardi
Department of Electronic and Computer Engineering, Northeastern University
Boston, MA 02115, U.S.A
Department of Computer Science, Oklahoma State University*
Stillwater, Oklahoma 74078-1053, U.S.A
Email: kkkim@ece.neu.edu, ybk@ece.neu.edu, npark@cs.okstate.edu*, lombardi@ece.neu.edu
Abstract - This paper presents a novel statistical characterization
methodology for accurate timing analysis for Partially Depleted
Silicon-On-Insulator (PD-SOI) digital circuits. The proposed
methodology is applied to ISCAS85 benchmarks circuits, and the
results show that the error is within 5% comparing to HSpice
simulation results.
Keywords - SOI (Silicon on Insulator), Statistical Modeling,
Statistical Analysis, Cell Characterization, Timing Analysis.
I. INTRODUCTION
Partially-Depleted Silicon-on-Insulator (PD-SOI) has

  

Source: Ayers, Joseph - Marine Science Center & Department of Biology, Northeastern University

 

Collections: Engineering