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Summary: IEEE TRANSACTIONS ON SOFTWARE ENGINEERING, VOL. XX, NO. Y, YEAR 100
Inference of Message Sequence Charts
Rajeev Alur, Kousha Etessami, Mihalis Yannakakis
Abstract-- Software designers draw Message Sequence
Charts for early modeling of the individual behaviors they
expect from the concurrent system under design. Can they
be sure that precisely the behaviors they have described are
realizable by some implementation of the components of the
concurrent system? If so, can we automatically synthesize
concurrent state machines realizing the given MSCs? If, on
the other hand, other unspecified and possibly unwanted
scenarios are "implied" by their MSCs, can the software de-
signer be automatically warned and provided the implied
MSCs? In this paper we provide a framework in which all
these questions are answered positively. We first describe
the formal framework within which one can derive implied
MSCs, and then provide polynomial-time algorithms for im-
plication, realizability, and synthesis.
Keywords-- Message sequence charts, requirements anal-
ysis, formal verification, scenarios, concurrent state ma-
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