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Summary: Exploring the Tradeoffs between Programmability and
Efficiency in Data-Parallel Accelerators
Yunsup Lee*, Rimas Avizienis*, Alex Bishara*, Richard Xia*, Derek Lockhart,
Christopher Batten, and Krste Asanovi´c*
*Department of Electrical Engineering and Computer Science
University of California, Berkeley, CA
{yunsup,rimas,abishara,rxia,krste}@eecs.berkeley.edu
School of Electrical and Computer Engineering
Cornell University, Ithaca, NY
{dml257,cbatten}@cornell.edu
ABSTRACT
We present a taxonomy and modular implementation approach
for data-parallel accelerators, including the MIMD, vector-SIMD,
subword-SIMD, SIMT, and vector-thread (VT) architectural design
patterns. We have developed a new VT microarchitecture, Maven,
based on the traditional vector-SIMD microarchitecture that is con-
siderably simpler to implement and easier to program than previ-
ous VT designs. Using an extensive design-space exploration of
full VLSI implementations of many accelerator design points, we
evaluate the varying tradeoffs between programmability and imple-
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