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Summary: Design and Performance Measurement of Efficient
IDEA (International Data Encryption Algorithm)
Crypto-Hardware using Novel Modular Arithmetic
Components
Rajashekhar Modugu1, Yong-Bin Kim2 and Minsu Choi1
1Dept of Electrical & Computer Engineering, Missouri University of Science and Technology
Rolla, MO 65401, USA, {rrmt4b, choim}@mst.edu
2Dept of Electrical & Computer Engineering, Northeastern University
Boston, MA 02115, USA, ybk@ece.neu.edu
Abstract--Cryptographic algorithms such as International
Data Encryption Algorithm(IDEA) have found various applica-
tions in secure transmission of the data in networked instru-
mentation and distributed measurement systems. Modulo 2n
+ 1
multiplier and squarer play a pivotal role in the implementation
of such crypto-algorithms. In this work, an efficient hardware
design of the IDEA (International Data Encryption Algorithm)
using novel modulo 2n
+ 1 multiplier and squarer as the basic
modules is proposed for faster, smaller and low-power IDEA
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