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Minithreads: Increasing TLP on SmallScale SMT Processors Joshua Redstone Susan Eggers Henry Levy
 

Summary: 1
Mini­threads: Increasing TLP on Small­Scale SMT Processors
Joshua Redstone Susan Eggers Henry Levy
University of Washington
{redstone,eggers,levy}@cs.washington.edu
Abstract
Several manufacturers have recently announced the
first simultaneous­multithreaded processors, both as sin­
gle CPUs and as components of multi­CPU chips. All are
small scale, comprising only two to four thread contexts. A
significant impediment to the construction of larger­scale
SMTs is the register file size required by a large number of
contexts. This paper introduces and evaluates mini­
threads, a simple extension to SMT that increases thread­
level parallelism without the commensurate increase in
register file size. A mini­threaded SMT CPU adds addi­
tional per­thread state to each hardware context; an appli­
cation executing in a context can create mini­threads that
will utilize its own per­thread state, but share the context's
architectural register set. The resulting performance will

  

Source: Anderson, Richard - Department of Computer Science and Engineering, University of Washington at Seattle

 

Collections: Computer Technologies and Information Sciences