 
Summary: Tree Regular Model Checking:
A SimulationBased Approach #
Parosh Aziz Abdulla a,2 , Axel Legay b,1 , Julien d'Orso c ,
Ahmed Rezine a,2
a Dept. of Information Technology
Uppsala University
P.O. Box 337
SE751 05 Uppsala, Sweden
b Universit’e de Li‘ege
Institut Montefiore, B28
4000 Li‘ege, Belgium
c LIAFA Universit’e Paris 7
175, rue du chevaleret
75013 Paris, France
Abstract
Regular model checking is the name of a family of techniques for analyzing infinite
state systems in which states are represented by words, sets of states by finite
automata, and transitions by finitestate transducers. In this framework, the central
problem is to compute the transitive closure of a transducer. Such a representation
allows to compute the set of reachable states of the system and to detect loops
