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The CMOS (complementary-metal-oxide-silicon) scaling rules require that advanced MOSFETs (metal-oxide-silicon field-effect

The CMOS (complementary-metal-oxide-silicon) scaling rules
require that advanced MOSFETs (metal-oxide-silicon field-effect
transistors) be fabricated with ultra-thin gate dielectrics as the
channel length reduces to the nanometer scale. MOSFET
performance degradation (reduced channel current and gate
capacitance) occurs due to polysilicon depletion and quantum
mechanical effects [1, 2]. Accurate Current-Voltage (I-V) and
Capacitance-Voltage (C-V) characteristics of the device for SPICE
(Simulation Program with Integrated Circuit Emphasis) application
are required, and as a consequence these effects need careful
modeling. Furthermore the model characteristics have to be in a
simple form to reduce circuit simulation time. The focus of this
paper is on modeling the I-V characteristics with quantum effects
for n-channel MOSFETs that are referenced to the substrate
terminal. Transistor I-V models developed in [3] and [4] are
simplified into a polynomial function using the technique
introduced in [5]. Preliminary I-V simulation and comparison give
good results (see Figures 1 and 2).
Keywords: Circuit simulation, device modeling, MOSFET,


Source: Abebe, Henok - Department of Physics and Astronomy, California State University, Los Angeles


Collections: Physics