Summary: A Customized MVA Model for ILP Multiprocessors \Lambda
Daniel J. Sorin y , Mary K. Vernon y , Vijay S. Pai z , Sarita V. Adve z , and David A. Wood y
y Computer Sciences Dept z Dept of Electrical & Computer Engineering
University of Wisconsin Madison Rice University
fsorin, vernon, firstname.lastname@example.org fvijaypai, email@example.com
University of WisconsinMadison Computer Sciences Technical Report #1369.
Rice University Electrical and Computer Engineering Technical Report #9803.
This paper provides the customized MVA equations for an analytical model for evaluating architectural alternatives for
sharedmemory multiprocessors with processors that aggressively exploit instructionlevel parallelism (ILP). Compared to
simulation, the analytical model is many orders of magnitude faster to solve, yielding highly accurate system performance
estimates in seconds.
In , we presented an analytical model for evaluating specific types of architectural tradeoffs for sharedmemory systems
with ILP processors. As shown in that paper, the analytical model validates extremely well against detailed simulation and
produces results in a few seconds.
The principal aspects of the model are:
ffl The ILP processor and its associated twolevel cache system are viewed as a black box that generates requests to the
memory system and intermittently blocks after a dynamically changing number of requests.
ffl We iterate between two submodels; one represents the blocking behavior due to load misses that cannot be retired until