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Tardiness Bounds for EDF Scheduling on Multi-Speed Multicore Hennadiy Leontyev and James H. Anderson
 

Summary: Tardiness Bounds for EDF Scheduling on Multi-Speed Multicore
Platforms
Hennadiy Leontyev and James H. Anderson
Department of Computer Science, University of North Carolina at Chapel Hill
Abstract
Multicore platforms, which include several processing cores
on a single chip, are being widely touted as a solution to heat
and energy problems that are impediments to single-core chip
designs. To accommodate both parallelizable and inherently-
sequential applications on the same platform, heterogeneous
multicore designs with faster and slower cores have been
proposed. In this paper, we consider the problem of scheduling
soft real-time workloads on such a platform.
1 Introduction
Given the thermal and power problems that plague single-
processor chip designs, most major chip manufacturers are
investing in multicore technologies to achieve higher system
performance. A number of systems with a modest number
of cores are currently available, and in the coming years, the
number of cores per chip is expected to increase significantly.

  

Source: Anderson, James - Department of Computer Science, University of North Carolina at Chapel Hill

 

Collections: Computer Technologies and Information Sciences