Summary: Fine-Grain CAM-Tag Cache Resizing Using Miss Tags
Michael Zhang
MIT Laboratory for Computer Science
200 Technology Square
Cambridge, MA 02139
rzhang@cag.lcs.mit.edu
Krste Asanovi´c
MIT Laboratory for Computer Science
200 Technology Square
Cambridge, MA 02139
krste@cag.lcs.mit.edu
ABSTRACT
A new dynamic cache resizing scheme for low-power CAM-
tag caches is introduced. A control algorithm that is only
activated on cache misses uses a duplicate set of tags, the
miss tags, to minimize active cache size while sustaining
close to the same hit rate as a full size cache. The cache
partitioning mechanism saves both switching and leakage
energy in unused partitions with little impact on cycle time.
Simulation results show that the scheme saves 28­56% of

Source: Asanovic, Krste - Computer Science and Artificial Intelligence Laboratory & Department of Electrical Engineering and Computer Science, Massachusetts Institute of Technology (MIT)
Asanoviæ, Krste - Computer Science and Artificial Intelligence Laboratory & Department of Electrical Engineering and Computer Science, Massachusetts Institute of Technology (MIT)
Massachusetts Institute of Technology (MIT), Computer Science and Artificial Intelligence Laboratory, SCALE Group

Collections: Computer Technologies and Information Sciences