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Fault Tolerant Source Routing for Network-on-chip Young Bok Kim, Yong-Bin Ki
 

Summary: Fault Tolerant Source Routing for Network-on-chip
Young Bok Kim, Yong-Bin Ki
Dept. of Electrical and Computer Engineering ,
Northeastern University, Boston, MA ,USA
ybk@ece.neu.edu
Abstract
This paper presents a new routing protocol of network-on-chip(Noc) called `Source
Routing for Noc'(SRN) for fault tolerant communication of Systems-on-chip(Soc). The
proposed SRN algorithm is composed of two mechanisms of Route Discovery and Route
maintenance to allow nodes to discover and maintain source routes to arbitrary destinations
in Noc, and all aspects of the protocol operate entirely on-demand allowing the routing
packet overhead to scale automatically based on its need. The SNR algorithm in this paper
demonstrates up to 50 % more fault tolerance comparing with the conventional algorithms.
This new method can be easily adapted and implemented with lower cost due to less
hardware overhead in SoC that integrate a large number of communicating IP cores.
1. Introduction
As CMOS technology scales down into the deep submicron(DSM) or nano-technology
domain, the fault tolerance is becoming a key issue. The new types of malfunction and failure
are difficult to predict and they are very difficult to diagnose with the current Systems-on-
chip(Soc) design methodologies. To reduce the cost of design, Soc and Noc must be designed

  

Source: Ayers, Joseph - Marine Science Center & Department of Biology, Northeastern University

 

Collections: Engineering