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High Efficiency Envelope Tracking LDMOS Power Amplifier P. Draxler, S. Lanfranco, D. Kimball, C. Hsia, J. Jeong, J. van de Sluis, and P. M. Asbeck
 

Summary: 1534
High Efficiency Envelope Tracking LDMOS Power Amplifier
for W-CDMA
P. Draxler, S. Lanfranco, D. Kimball, C. Hsia, J. Jeong, J. van de Sluis, and P. M. Asbeck
Abstract-A high performance W-CDMA base station power
amplifier is presented, which uses an envelope tracking bias
system along with an advanced 0.4um gate length LDMOS
transistor, to achieve high efficiency. High linearity is also
achieved by employing digital predistortion. For a target
WCDMA envelope with a peak-to-average power ratio of 7.6 dB,
the measured overall power-added efficiency (PAE) is as high as
40.4 %. Within this system, the RF power amplifier has an
average Drain Efficiency of approximately 64%, and the
envelope amplifier has about 60% efficiency. After the
memoryless digital predistortion the normalized power RMS
error is 3.3%, at an average output power of 27 W and gain of
14.9 dB. After memory mitigation the normalized power RMS
error drops to below 1.0%. The efriciency ranks among the
highest reported for a single stage LDMOS W-CDMA base
station amplifier.

  

Source: Asbeck, Peter M. - Department of Electrical and Computer Engineering, University of California at San Diego

 

Collections: Engineering