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IEEE TRANSACTIONS ON EVOLUTIONARY COMPUTATION, VOL. 5, NO. 1, FEBRUARY 2001 27 Synthesis of Low-Power DSP Systems Using a
 

Summary: IEEE TRANSACTIONS ON EVOLUTIONARY COMPUTATION, VOL. 5, NO. 1, FEBRUARY 2001 27
Synthesis of Low-Power DSP Systems Using a
Genetic Algorithm
Marc S. Bright and Tughrul Arslan, Member, IEEE
Abstract--This paper presents a new tool for the synthesis of
low-power VLSI designs, specifically, those designs targeting dig-
ital signal processing applications. The synthesis tool genetic algo-
rithm for low-power synthesis (GALOPS) uses a genetic algorithm
to apply power-reducing transformations to high-level signal-pro-
cessing designs, producing designs that satisfy power requirements
as well as timing and area constraints. GALOPS uses problem-spe-
cific genetic operators that are specifically tailored to incorporate
VLSI-based digital signal processing design knowledge. A number
of signal-processing benchmarks are used to facilitate the analysis
of low-power design tools, and to aid in the comparison of results.
Results demonstrate that GALOPS achieves significant power re-
ductions in the presented benchmark designs. In addition, GA-
LOPS produces a family of unique solutions for each design, all of
which satisfy the multiple design objectives, providing flexibility to
the VLSI designer.

  

Source: Arslan, Tughrul - School of Engineering and Electronics, University of Edinburgh

 

Collections: Engineering