Summary: IEEE International Symposium on Circuits and Systems (ISCAS'99), Florida, 30 May -- 2 June 1999.
1
A COEFFICIENT SEGMENTATION ALGORITHM FOR
LOW POWER IMPLEMENTATION OF FIR FILTERS
A. T. Erdogan and T. Arslan
University of Edinburgh
Department of Electronics and Electrical Engineering
Edinburgh, EH9 3JL, Scotland, UK.
Ahmet.Erdogan@ee.ed.ac.uk Tughrul.Arslan@ee.ed.ac.uk
ABSTRACT
The authors present a multiplication algorithm for low power
implementation of digital filters on CMOS based digital signal
processing systems. The algorithm decomposes individual
coefficients into two primitive sub­components. The
decomposition, performed using a heuristic approach, divides a
given coefficient such that a part is produced which can be
implemented using a single shift operation leaving another part
with a reduced wordlength to be applied to the coefficient input
of the hardware multiplier. This results in a significant
reduction in the amount of switched capacitance and

Source: Arslan, Tughrul - School of Engineering and Electronics, University of Edinburgh

Collections: Engineering