Home

About

Advanced Search

Browse by Discipline

Scientific Societies

E-print Alerts

Add E-prints

E-print Network
FAQHELPSITE MAPCONTACT US


  Advanced Search  

 
0740-7475/03/$17.00 2003 IEEE Copublished by the IEEE CS and the IEEE CASS NovemberDecember 2003 IT IS WITH GREAT PLEASURE that we introduce the
 

Summary: 0740-7475/03/$17.00 © 2003 IEEE Copublished by the IEEE CS and the IEEE CASS November­December 2003
IT IS WITH GREAT PLEASURE that we introduce the
special issue on clockless VLSI design to the readership
of IEEE Design & Test. This special issue consists of six arti-
cles selected to cover a wide spectrum of techniques and
applications encountered in the design and manufacture
of today's clockless VLSI systems. Authored by outstand-
ing researchers, these articles cover experimental and
speculative topics. As with all special issues, the topics
that we cover here are just the highlights of the large vol-
ume of literature currently provided by the technical com-
munity.
Difficulties associated with traditional synchronous
design have prompted many researchers to consider
new alternatives. Three factors drive current research
and development efforts in the design and test of clock-
less digital systems: low power, performance, and
design for reuse.
Low power
The mainstream design style in use for today's

  

Source: Ayers, Joseph - Marine Science Center & Department of Biology, Northeastern University

 

Collections: Engineering