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Summary: Low Power CMOS Adaptive Electronic
Central Pattern Generator Design
Young Jun Lee, Jihyun Lee, and Yong-Bin Kim
Department of Computer Engineering
Northeastern University
Boston, MA 02115
Email: yjlee@ece.neu.edu, jlee@ece.neu.edu, ybk@ece.neu.edu
Joseph Ayers
Department of Biology
Northeastern University
Boston, MA 02115
Email: lobster@neu.edu
Abstract-- In this paper, low power VLSI implementation of
adaptive analog controller for autonomous robot is presented
using standard CMOS process with 2Î supply voltage. Electronic
neuron and synapse circuit are developed based on Hindmarsh-
Rose neuron model and first order synapse model. In order
to achieve low power consumption, CMOS subthreshold circuit
techniques are used. The power consumption is 4.8 ÑÏ and
die size is 2ÑÑ by 2ÑÑ. Simulation results demonstrate that
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