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Analysis and Improvement of Performance and Power Consumption of Chip Multi-Threading SMP Architectures
 

Summary: Analysis and Improvement of Performance and Power Consumption of Chip Multi-
Threading SMP Architectures
By: Ryan Eric Grant
A thesis submitted to the Department of Electrical and Computer Engineering in
conformity with the requirements for the degree of Master of Science (Engineering)
Queen's University
Kingston, Ontario, Canada
August, 2007
Copyright Ryan E. Grant, 2007
-i-
Abstract
Emerging processor technologies are becoming commercially available that make
multi-processor capabilities affordable for use in a large number of computer systems.
Increasing power consumption by this next generation of processors is a growing concern
as the cost of operating such systems continues to increase.
It is important to understand the characteristics of these emerging technologies in
order to enhance their performance. By understanding the characteristics of high
performance computing workloads on real systems, the overall efficiency with which
such workloads are executed can be increased. In addition, it is important to determine
the best trade-off between system performance and power consumption using the variety

  

Source: Afsahi, Ahmad - Department of Electrical and Computer Engineering, Queen's University (Kingston)

 

Collections: Computer Technologies and Information Sciences