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Summary: Cache-Conscious Data Placement
Brad Calder Chandra Krintz Simmi John Todd Austin
Dept. of Computer Science and Engineering Microcomputer Research Labs
University of California, San Diego Intel Corporation
fcalder,ckrintz,sjohng@cs.ucsd.edu taustin@ichips.intel.com
Abstract
As the gap between memory and processor speeds continues
to widen, cache efficiency is an increasingly important component
of processor performance. Compiler techniques have been used
to improve instruction cache performance by mapping code with
temporal locality to different cache blocks in the virtual address
space eliminating cache conflicts. These code placement techniques
can be applied directly to the problem of placing data for improved
data cache performance.
In this paper we present a general framework for Cache Con-
scious Data Placement. This is a compiler directed approach that
creates an address placement for the stack (local variables), global
variables, heap objects, and constants in order to reduce data cache
misses. The placement of data objects is guided by a temporal rela-
tionship graph between objects generated via profiling. Our results
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