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IEEE TRANSACTIONS ON PARALLEL AND DISTRIBUTED SYSTEMS, VOL. 4, NO. 6. JUNE 1993 601 A Sliding Memory Plane Array Processor
 

Summary: IEEE TRANSACTIONS ON PARALLEL AND DISTRIBUTED SYSTEMS, VOL. 4, NO. 6. JUNE 1993 601
A Sliding Memory Plane Array Processor
Myung Hoon Sunwoo, Member, IEEE, and J. K. Agganval, Fellow, IEEE
Abstract-This paper describes a new mesh-connected SIMD
architecture, called a Sliding Memory Plane (SIiM)Array Proces-
sor. On SIiM, the inter-processing element (inter-PE) communi-
cation, using the sliding memory plane, and the data input/output
(I/O), using two U 0 planes, can occur without interrupting
the PE's, which greatly diminishes the communication and I/O
overhead. SliM is unique in its ability to overlap inter-PE com-
munication with computation, regardless of window size and
shape and without using a coprocessor or an on-chip DMA
controller. In addition, SliM uses four rather than eight links per
PE to provide eight-way connectivity using the by-passing path,
thus reducing the diagonal communication time and eliminating
the necessity of diagonal links. The realization of these virtual
links for diagonal communication without instruction overhead
is another novel feature of SYM. An alternative method to
achieve diagonal communication is to use two sliding memory
plane shifts that can be overlapped with computation. The by-

  

Source: Aggarwal, J. K. - Department of Electrical and Computer Engineering, University of Texas at Austin

 

Collections: Computer Technologies and Information Sciences; Engineering