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Efficient Software Decoder Design Rajeev Krishna, Todd Austin

Summary: Efficient Software Decoder Design
Rajeev Krishna, Todd Austin
Advanced Computer Architecture Laboratory
University of Michigan
{rkrishna, taustin} @ eecs.umich.edu
In this paper, we evaluate several techniques for
generating and optimizing high speed software decod-
ers. We begin by presenting the early stages of a new
instruction set description language named `Rosetta'.
We use specifications written in this language to auto-
matically generate a number of different software
decoders. We explore heuristics for generating decoder
trees, particularly with regard to enumerating "don't
care" bit positions during evaluation in order to reduce
decode tree depth and thus increase performance. We
also investigate the application of cache-conscious data
placement techniques, decoder structure, and the effects
of non-contiguous bit sequences on decoder perfor-
mance. By applying these techniques to decoders pro-


Source: Austin, Todd M. - Department of Electrical Engineering and Computer Science, University of Michigan


Collections: Engineering; Computer Technologies and Information Sciences