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LOW POWER REAL TIME ELECTRONIC NEURON VLSI DESIGN USING SUBTHRESHOLD TECHNIQUE
 

Summary: LOW POWER REAL TIME ELECTRONIC NEURON VLSI DESIGN USING
SUBTHRESHOLD TECHNIQUE
Young Jun Lee, Jihyun Lee, Y.B. Kim, J. Ayersİ
, A.VolkovskiiŞ
, A.SelverstonŞ
, H.Abarbanel*Ş
, M.RabinovichŞ
Electrical and Computer Engineering Department, Marine Science Centerİ
,Northeastern University, Boston,MA
Dept. of Physics ² SIO*, Institute for Nonlinear ScienceŞ
, University of California, San Diego, La Jolla, CA
yjlee@ece.neu.edu, jlee@ece.neu.edu, ybk@ece.neu.edu, lobster@neu.eduİ
ABSTRACT
We discuss a VLSI electronic neuron circuit that imple-
ments Hindmarsh and Rose neuron model. Magnitude and
time scaling techniques are employed for 2V power sup-
ply operation. A subthreshold operation technique and a
single MOS resistor are used to minimize area and power
consumption. Output bursts of the electronic neuron can be
modulated dynamically by varying the input voltage level.

  

Source: Ayers, Joseph - Marine Science Center & Department of Biology, Northeastern University

 

Collections: Engineering