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Summary: Contributed article
ANNSyS: an Analog Neural Network Synthesis System
Ismet Bayraktaroglua
, Arif Selc¸uk O¨ grencib
, Gu¨nhan Du¨ndarb,*, Sina Balkirb
, Ethem Alpaydinc
a
Computer Science and Engineering Department, UC San Diego, San Diego, CA 92093, USA
b
Department of Electrical and Electronic Engineering, Bogazic¸i University, Bebek 80815, Istanbul, Turkey
c
Department of Computer Engineering, Bogazic¸i University, Bebek 80815, Istanbul, Turkey
Received 19 January 1998; accepted 3 August 1998
Abstract
A synthesis system based on a circuit simulator and a silicon assembler for analog neural networks to be implemented in MOS technology
is presented. The system approximates on-chip training of the neural network under consideration and provides the best starting point for
`chip-in-the-loop training'. Behaviour of the analog neural network circuitry is modeled according to its SPICE simulations and those models
are used in the initial training of the analog neural networks prior to the fine tuning stage. In this stage, the simulator has been combined with
Madaline Rule III for approximating on chip training by software, thus minimizing the effects of circuit nonidealities on neural networks. The
circuit simulator partitions the circuit into decoupled blocks which can be simulated separately, with the output of one block being the input
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