Summary: Generalized Tardiness Bounds for Global Multiprocessor
James H. Anderson
Department of Computer Science, The University of North Carolina at Chapel Hill
We consider the issue of deadline tardiness under global multiprocessor scheduling algo
rithms. We present a general tardinessbound derivation that is applicable to a wide variety of
such algorithms (including some whose tardiness behavior has not been analyzed before). Our
derivation is very general: job priorities may change rather arbitrarily at runtime, capacity restric
tions may exist on certain processors, and, under certain conditions, nonpreemptive regions are
allowed. Our results show that, with the exception of staticpriority algorithms, most global al
gorithms considered previously have bounded tardiness. In addition, our results provide a simple
means for checking whether tardiness is bounded under newlydeveloped algorithms.
Most major chip manufacturers are investing in multicore technologies to continue performance im
provements in their product lines in the face of fundamental limitations of singlecore chip designs.
To date, several manufacturers have released dualcore chips, Intel and AMD each have quadcore
chips on the market, and Sun's Niagara and more recent Niagara 2 systems have eightcore chips
with multiple hardware threads per core. In the future, perchip core counts are expected to increase