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Summary: An Optimized Direct Digital Frequency Synthesizer Based on
Even Fourth Order Polynomial Interpolation
Ashkan Ashrafi
Department of Electrical and Computer Engineering
The University of Alabama in Huntsville
ashkan@ieee.org
Reza Adhami
Department of Electrical and Computer Engineering
The University of Alabama in Huntsville
rradhami@eng.uah.edu
Key Words: Direct Digital Frequency Synthesizer, Polynomial Interpolation, Spurious Harmonic Analysis
Abstract In this paper, an optimized direct digital
frequency synthesizer (DDFS) utilizing even fourth order
polynomial is introduced. The spurious free dynamic
range (SFDR) upper bound of the design is evaluated
and an optimized digital system is designed to implement
the method. It is shown that SFDR of the implemented
digital system is 72.2dBc, which is only 2.15dBc less than
the theoretical SFDR upper bound. Finally, the proposed
system is realized in a chip using a 0.13 m standard cell
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