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Summary: RAMP Gold: An FPGA-based Architecture Simulator for
Multiprocessors
Zhangxi Tan, Andrew Waterman, Rimas Avizienis, Yunsup Lee, Henry Cook,
David Patterson, Krste Asanovi´c
The Parallel Computing Laboratory
CS Division, EECS Department, University of California, Berkeley
{xtan,waterman,rimas,yunsup,hcook,pattrsn,krste}@eecs.berkeley.edu
ABSTRACT
We present RAMP Gold, an economical FPGA-based archi-
tecture simulator that allows rapid early design-space explo-
ration of manycore systems. The RAMP Gold prototype is
a high-throughput, cycle-accurate full-system simulator that
runs on a single Xilinx Virtex-5 FPGA board, and which
simulates a 64-core shared-memory target machine capable
of booting real operating systems. To improve FPGA imple-
mentation efficiency, functionality and timing are modeled
separately and host multithreading is used in both mod-
els. We evaluate the prototype's performance using a mod-
ern parallel benchmark suite running on our manycore re-
search operating system, achieving two orders of magnitude
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