Home

About

Advanced Search

Browse by Discipline

Scientific Societies

E-print Alerts

Add E-prints

E-print Network
FAQHELPSITE MAPCONTACT US


  Advanced Search  

 
Abstract--Our Mutation-based Validation Paradigm (MVP) is a validation environment for high-level microprocessor imple-
 

Summary: 1
Abstract--Our Mutation-based Validation Paradigm (MVP)
is a validation environment for high-level microprocessor imple-
mentations. To be able to efficiently generate test sequences, we
need to enable MVP's ATPG to learn important details of the cir-
cuit under validation as a means to explore critical new circuit
scenarios. In this paper, we present new profiling mechanisms
that can exist either as a pre-processor that gathers circuit infor-
mation prior to the circuit validation process, or as run-time enti-
ties that allow MVP to learn from its progressive experience.
I. INTRODUCTION
Our Mutation-based Validation Paradigm (MVP)
[1][2][3][4] technology contains the fundamental techniques
for analyzing high-level circuit implementations, and is unique
in the way it exploits these techniques to validate circuit imple-
mentations. MVP's methods help deliver certainty into a cir-
cuit validation project in two ways: (i) It provides real-time
observability into the validation effort through a concurrent
mutant simulator that quantifies the circuit coverage (certainty
level) at every simulation time-frame, and (ii) it employs deter-

  

Source: Al-Asaad, Hussain - Department of Electrical and Computer Engineering, University of California, Davis

 

Collections: Computer Technologies and Information Sciences