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The T0 Vector Microprocessor Krste Asanovic
 

Summary: The T0 Vector Microprocessor
Krste Asanovic
Brian E. D. Kingsbury
James Beck
Bertrand Irissou
Nelson Morgan
John Wawrzynek
University of California at Berkeley
and the
International Computer Science Institute
Primary support for this work was from the ONR, URI Grant N00014-92-J-1617,
Additional support was provided by ICSI.
the NSF, grants MIP-8922354/MIP-9311980, and ARPA, contract number
N0001493-C0249.
{krste,johnw}@cs.berkeley.edu
Slides from presentation at the Hot Chips VII conference, 15 August 1995..
Talk Outline
Why Vector Microprocessors?
T0 (Torrent-0) Microarchitecture
T0 Implementation and Packaging

  

Source: Asanovic, Krste - Computer Science and Artificial Intelligence Laboratory & Department of Electrical Engineering and Computer Science, Massachusetts Institute of Technology (MIT)

 

Collections: Computer Technologies and Information Sciences