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Dynamic Gate Bias Technique for Improved Linearity of GaN HFET Power Amplifiers
 

Summary: Dynamic Gate Bias Technique for Improved Linearity
of GaN HFET Power Amplifiers
Adam M. Conway1
, Yu Zhao1
, Peter M. Asbeck1
, Miroslav Micovic2
, and Jeong Moon2
1. Dept. of Electrical and Computer Engineering, University of California at San Diego, 9500 Gilman Dr.
La Jolla, Ca 92093
2. HRL Laboratories, LLC 3011 Malibu Canyon Rd Malibu, CA 90265
Abstract -- This work demonstrates a significant reduction in
third order intermodulation distortion of an AlGaN/GaN HFET
using the dynamic gate bias technique. In this technique the gate
bias and thus the gain of the transistor is adjusted in accordance
with the instantaneous envelope of the input signal to minimize
AM-AM distortion while maintaining high efficiency of deep
class AB operation. A 10 dB reduction in IM3 was measured in
two-tone tests, centered at 815 MHz.
Index Terms -- GaN, linearity, dynamic gate bias, power
amplifiers.

  

Source: Asbeck, Peter M. - Department of Electrical and Computer Engineering, University of California at San Diego

 

Collections: Engineering