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Improving the Accuracy vs. Speed Tradeoff for Simulating SharedMemory Multiprocessors with ILP Processors \Lambda y

Summary: Improving the Accuracy vs. Speed Tradeoff for
Simulating Shared­Memory Multiprocessors with ILP Processors \Lambda y
Murthy Durbhakula, Vijay S. Pai, Sarita Adve
Department of Electrical and Computer Engineering
Rice University
Houston, Texas 77005
Rice University ECE Technical Report 9802, April 1998, revised December 1998
Previous simulators for shared­memory architectures
have imposed a large tradeoff between simulation accu­
racy and speed. Most such simulators model simple pro­
cessors that do not exploit common instruction­level paral­
lelism (ILP) features, consequently exhibiting large errors
when used to model current systems. A few newer simula­
tors model current ILP processors in detail, but we find them
to be about ten times slower. We propose a new simulation
technique, based on a novel adaptation of direct execution,
that alleviates this accuracy vs. speed tradeoff.
We compare the speed and accuracy of our new simu­


Source: Adve, Sarita - Department of Computer Science, University of Illinois at Urbana-Champaign


Collections: Computer Technologies and Information Sciences