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A 12-bit Digitally Controlled Oscillator with Low Power Consumption and Low Jitter
 

Summary: A 12-bit Digitally Controlled Oscillator with Low
Power Consumption and Low Jitter
Jun Zhao
Department of Electrical and Computer Engineering
Northeastern University
Boston, MA, 02115
Email: jzhao@ece.neu.edu
Yong-Bin Kim
Department of Electrical and Computer Engineering
Northeastern University
Boston, MA, 02115
Email: ybk@ece.neu.edu
Abstract-- In this paper, a low power and low jitter 12-bit
CMOS digitally controlled oscillator (DCO) design is presented.
The CMOS DCO is designed based on a ring oscillator
implemented with Schmitt trigger based inverters. Simulations
of the proposed DCO using 32nm CMOS Predictive Transistor
Model (PTM) achieves controllable frequency range of
570MHz~850MHz with a wide linearity range. Monte Carlo
simulation demonstrates that the time-period jitter due to

  

Source: Ayers, Joseph - Marine Science Center & Department of Biology, Northeastern University

 

Collections: Engineering