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808 IEEE TRANSACTIONS ON COMPONENTS AND PACKAGING TECHNOLOGY, VOL. 32, NO. 4, DECEMBER 2009 High-Density Embedded Deep Trench Capacitors in
 

Summary: 808 IEEE TRANSACTIONS ON COMPONENTS AND PACKAGING TECHNOLOGY, VOL. 32, NO. 4, DECEMBER 2009
High-Density Embedded Deep Trench Capacitors in
Silicon With Enhanced Breakdown Voltage
Houri Johari and Farrokh Ayazi, Senior Member, IEEE
Abstract--This paper reports on the design, implementation,
and characterization of high-density trench-refilled capacitors
in complementary metal­oxide­semiconductor (CMOS) grade
silicon (1­10 cm). High aspect ratio trench-refilled capacitors
offer a capacitance density improvement of three orders of
magnitude compared to thin-film capacitors with the same die
area and dielectric thickness. Also, dielectric materials such as
low-pressure chemical vapor deposition (LPCVD) silicon oxide
and silicon nitride are utilized to enhance the breakdown voltage
of these devices. The high aspect ratio polysilicon and single
crystal silicon process was utilized to implement these capacitors,
giving a gap aspect ratio of >4000. This ultrahigh vertical
capacitance area achieves an ultralarge capacitance density
without requiring thin-or high-k dielectric material. High-value
capacitors of values ranging from 40nF to 4F with capacitance
density of 58(nF/mm2) were implemented in silicon as arrays

  

Source: Ayazi, Farrokh - School of Electrical and Computer Engineering, Georgia Institute of Technology

 

Collections: Engineering