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VERIFICATION AND PERFORMANCE OF THE DENOVO CACHE COHERENCE PROTOCOL
 

Summary: VERIFICATION AND PERFORMANCE OF
THE DENOVO CACHE COHERENCE PROTOCOL
BY
RAKESH KOMURAVELLI
THESIS
Submitted in partial fulfillment of the requirements
for the degree of Master of Science in Computer Science
in the Graduate College of the
University of Illinois at Urbana-Champaign, 2010
Urbana, Illinois
Adviser:
Professor Sarita Adve
ABSTRACT
With the advent of multicores, parallel programming has gained a lot of importance. For parallel program-
ming to be viable for the predicted hundreds of cores per chip, shared memory programming languages and
environments must evolve to enforce disciplined practices like "determinism-by-default semantics" and ban
"wild shared-memory behaviors" like arbitrary data races and potential non-determinism everywhere. This
evolution can not only benefit software development, but can also greatly reduce the complexity in hard-
ware. DeNovo is a hardware architecture designed from the ground up to exploit the opportunities exposed
by such disciplined software models to make the hardware much simpler and efficient at the same time.

  

Source: Adve, Sarita - Department of Computer Science, University of Illinois at Urbana-Champaign

 

Collections: Computer Technologies and Information Sciences