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HIGH THROUGHPUT FIR FILTER DESIGN FOR LOW POWER SOC APPLICATIONS A. T. Erdogan and T. Arslan
 

Summary: HIGH THROUGHPUT FIR FILTER DESIGN FOR LOW POWER SOC APPLICATIONS
A. T. Erdogan and T. Arslan
University of Edinburgh,
Department of Electronics & Electrical Engineering,
Edinburgh EH9 3JL, Scotland, United Kingdom.
Ahmet.Erdogan@ee.ed.ac.uk Tughrul.Arslan@ee.ed.ac.uk
ABSTRACT
This paper introduces a framework for the implementation of
high throughput FIR filters for low power applications. The
design methodology incorporated in this framework results in
highly flexible FIR filter cores, which are open to exploitation
by coefficient and data manipulation techniques resulting in
significant power savings. Power savings are achieved within
the multiplier units and on system buses making the resulting
FIR filters ideal for use as IPs on SoC based platforms. The
paper describes the design methodology, evaluation
environment and presents results with a number of FIR filter
example benchmarks under different design constraints.
I. INTRODUCTION
One of the fastest growing areas in the computing industry is

  

Source: Arslan, Tughrul - School of Engineering and Electronics, University of Edinburgh

 

Collections: Engineering