Summary: Symbolic Exploration of Transition Hierarchies ?
Rajeev Alur ?? Thomas A. Henzinger ??? Sriram K. Rajamani y
Abstract. In formal design verification, successful model checking is typically
preceded by a laborious manual process of constructing design abstractions. We
present a methodology for partially---and in some cases, fully---bypassing the
abstraction process. For this purpose, we provide to the designer abstraction
operators which, if used judiciously in the description of a design, structure the
corresponding state space hierarchically. This structure can then be exploited by
verification tools, and makes possible the automatic and exhaustive exploration
of state spaces that would otherwise be out of scope for existing model checkers.
Specifically, we present the following contributions:
-- A temporal abstraction operator that aggregates transitions and hides in
termediate steps. Mathematically, our abstraction operator is a function
that maps a flat transition system into a twolevel hierarchy where each
atomic upperlevel transition expands into an entire lowerlevel transition
system. For example, an arithmetic operation may expand into a sequence
of bit operations.
-- A BDDbased algorithm for the symbolic exploration of multilevel hierar
chies of transition systems. The algorithm traverses a leveln transition by
expanding the corresponding level(n \Gamma 1) transition system onthefly. The