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IEEE Transactions on Parallel and Distributed Systems SoftwareDirected Register Deallocation for Simultaneous
 

Summary: Page 1
IEEE Transactions on Parallel and Distributed Systems
Software­Directed Register Deallocation for Simultaneous
Multithreaded Processors
Jack L. Lo # , Sujay S. Parekh, Susan J. Eggers, Henry M. Levy, and Dean M. Tullsen*
# Transmeta Corp.
3940 Freedom Circle
Santa Clara, CA 95054
Dept. of Computer Science and Engineering
Box 352350
University of Washington
Seattle, WA 98195­2350
*Dept. of Computer Science and Engineering
University of California, San Diego
9500 Gilman Drive
La Jolla, CA 92093­0114
Abstract
This paper proposes and evaluates software techniques that increase register file utilization
for simultaneous multithreading (SMT) processors. SMT processors require large register files to
hold multiple thread contexts that can issue instructions out of order every cycle. By supporting

  

Source: Anderson, Richard - Department of Computer Science and Engineering, University of Washington at Seattle
Wang, Deli - Department of Electrical and Computer Engineering, University of California at San Diego

 

Collections: Computer Technologies and Information Sciences; Engineering; Materials Science