Home

About

Advanced Search

Browse by Discipline

Scientific Societies

E-print Alerts

Add E-prints

E-print Network
FAQHELPSITE MAPCONTACT US


  Advanced Search  

 
1210 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 41, NO. 5, MAY 2006 A SiGe PA With Dual Dynamic Bias Control and
 

Summary: 1210 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 41, NO. 5, MAY 2006
A SiGe PA With Dual Dynamic Bias Control and
Memoryless Digital Predistortion for WCDMA
Handset Applications
Junxiong Deng, Member, IEEE, Prasad S. Gudem, Member, IEEE, Lawrence E. Larson, Fellow, IEEE,
Donald F. Kimball, Member, IEEE, and Peter M. Asbeck, Fellow, IEEE
Abstract--This paper demonstrates a two-stage 1.95-GHz
WCDMA handset RFIC power amplifier (PA) implemented in a
0.25- m SiGe BiCMOS process. With an integrated dual dynamic
bias control of the collector current and collector voltage, the av-
erage power efficiency of the two-stage PA is improved from 1.9%
to 5.0%. The measured power gain is 18.5 dB. The gain variation
with dynamic biasing is less than 1.8 dB. An off-chip memoryless
digital predistortion linearizer is also adopted, satisfying the
3GPP wideband code division multiple access (WCDMA) linearity
specification by a 10 dB improvement of adjacent channel power
ratio (ACPR) at +26 dBm average channel output power.
Index Terms--ACPR, average power efficiency, digital predistor-
tion, dynamic bias control, linearity, memoryless systems, power
amplifiers, Silicon Germanium, WCDMA.

  

Source: Asbeck, Peter M. - Department of Electrical and Computer Engineering, University of California at San Diego
Larson, Larry - Department of Electrical and Computer Engineering, University of California at San Diego

 

Collections: Engineering