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Ultra LowVoltage Delay Locked Loop Using Carbon Nanotubes
 

Summary: Ultra LowVoltage Delay Locked Loop
Using Carbon Nanotubes
J.S. Ajit
Northeastern University
Dept. of Electrical and Computer Engineering
360 Huntington Ave., Boston, MA 02115
E-mail: ajit.j@husky.neu.edu
Yong-Bin Kim
Northeastern University
Dept. of Electrical and Computer Engineering
360 Huntington Ave., Boston, MA 02115
E-mail: ybk@ece.neu.edu
AbstractCarbon Nanotube FET technology is investigated to
implement ultra lowvoltage DLL and simulation results show
that operation at supply voltage as low as 0.3 V is possible with a
peak jitter of 13 ps and lock is acquired in 7 cycles with a clock
frequency range from 330 MHz to 10 GHz. The characteristics
is dependent on the nanotube parameters and the optimum
nanotube diameter is found to be 1.35 nm.

  

Source: Ayers, Joseph - Marine Science Center & Department of Biology, Northeastern University

 

Collections: Engineering