Advanced Search

Browse by Discipline

Scientific Societies

E-print Alerts

Add E-prints

E-print Network

  Advanced Search  

September 2007 (vol. 8, no. 9), art. no. 0709-mds2007090003 1541-4922 2007 IEEE

Summary: September 2007 (vol. 8, no. 9), art. no. 0709-mds2007090003
1541-4922 2007 IEEE
Published by the IEEE Computer Society
Distributed Wisdom
Concurrency and the Principle of Data Locality
Hagit Attiya Technion
Because clock frequency has hardly advanced in recent years, major chip manufacturers are shifting
their focus from improving the speed of individual processors to increasing parallel-processing
capabilities. Multicore technology refers to a processor with more than one engine, allowing for greater
efficiency because the processor workload is essentially shared. With multicore and multiprocessing
architectures becoming common, it's imperative to devise effective software tools for managing the
difficulty of concurrent programming.
At the same time, applications must be designed to exploit parallelism and avoid the perils of
sequential execution. To utilize the architecture's capabilities, it's critical to allow many operations to
make progress concurrently and to complete without interference.
Multiword synchronization
A good example of the challenge in obtaining high throughput is multiword synchronization operations,
such as k-compare-and-swap (kCAS). Such operations allow reading the contents of several memory
locations, comparing them with specified values, and if they all match, updating the locations--all in
one atomic operation. Multiword synchronization facilitates the design and implementation of


Source: Attiya, Hagit - Department of Computer Science, Technion, Israel Institute of Technology


Collections: Computer Technologies and Information Sciences