Summary: Abstract - State assignment for finite state machines is a criti-
cal optimization problem in the synthesis of sequential circuits.
In this paper we address the state assignment problem from a
low power perspective. We experiment with Boolean Satisfiabili-
ty and Integer Linear Programming techniques to solve the as-
signment problem where the primary goal is the reduction of
switching activity during state transitions. We also detect and
evaluate the use of symmetries in speeding up the search process.
These techniques have been applied to the MCNC benchmark
circuits and yielded promising results.
Keywords - State Assignment, Power, Integer Linear Program-
ming, Boolean Satisfiability
With the ever increasing integration scale, power con-
sumption has emerged as a major design constraint for inte-
grated circuits. During logic synthesis of sequential circuits,
i.e. finite state machines (FSMs), assigning binary codes to
each state in the circuit is a critical step in the low power de-
sign of the circuit. The state encoding problem for low power
has been explored by a number of researchers. Recent work