Summary: Caching Single­Assignment Structures
to Build a Robust Fine­Grain Multi­Threading System
Wen­Yen Lin and Jean­Luc Gaudiot
Dept. of Electrical Engineering ­ Systems
University of Southern California
Los Angeles, CA 90089­2563
Jos'e Nelson Amaral and Guang R. Gao
Dept. of Electrical and Computer Engineering
University of Delaware
Newark, DE 19716
Abstract
We present the design, implementation, and eval­
uation of single assignment data structures and of a
software controlled cache in an existing multi­threaded
architecture platform -- the Efficient Architecture for
Running Threads (EARTH). The software­controlled
cache (ISSC) exploits temporal and spatial locality of
EARTH split­phased memory transactions for single­
assignment memory references. Our experimental eval­
uation indicates that the caching mechanism for single­

Source: Amaral, José Nelson - Department of Computing Science, University of Alberta

Collections: Computer Technologies and Information Sciences