Summary: Automatatheoretic Verification of RealTime Systems
Computing Science Research
AT&T Bell Labs
Murray Hill, NJ 07974.
email: alur @ research.att.com
Computer Science Department
Stanford, CA 94305
email: dill @ cs.stanford.edu
November 2, 1995
Formal methods for specifying, analyzing, and manipulating the behavior of concurrent systems
become much more attractive in practical use if they can be automated. A number of methods
based on finitestate representations have achieved considerable success in practical applications
such as protocol and hardware verification, precisely because many problems are decidable for
finitestate representations. Finitestate verification methods include checking equivalences (such as
bisimulation), preorders (such as simulation), temporal logic properties (eg. CTL modelchecking),
and inclusion of the language of one automaton in another.