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Optimizing CAM-based instruction cache designs for low-power embedded systems

Summary: Optimizing CAM-based instruction cache designs for low-power
embedded systems
Juan L. Aragón a,*, Alexander V. Veidenbaum b
Department Ingenieria y Tecnología de Computadores, Universidad de Murcia, 30100 Murcia, Spain
Department of Computer Science, University of California, Irvine, CA, USA
a r t i c l e i n f o
Article history:
Received 10 December 2007
Received in revised form 22 February 2008
Accepted 3 June 2008
Available online 11 June 2008
Embedded systems
Energy-efficient architectures
Fetch unit design
a b s t r a c t
Energy consumption and power dissipation are important concerns in the design of embedded systems
and they will become even more crucial with finer process geometry, higher frequencies, deeper pipe-


Source: Aragón Alcaraz, Juan Luis - Departamento de Ingenieria y Tecnologia de Computadores, Universidad de Murcia


Collections: Computer Technologies and Information Sciences