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Configurable Transient Fault Detection via Dynamic Binary Translation
 

Summary: Configurable Transient Fault Detection
via Dynamic Binary Translation
George A. Reis Jonathan Chang
David I. August
Depts. of Electrical Engineering and Computer Science
Princeton University
{gareis,jcone,august}@princeton.edu
Robert Cohn Shubhendu S. Mukherjee
VSSAD and FACT Groups
Intel Massachusetts
{robert.s.cohn,shubu.mukherjee}@intel.com
ABSTRACT
Smaller feature sizes, lower voltage levels, and reduced noise mar-
gins have helped improve the performance and lower the power con-
sumption of modern microprocessors. These same advances have
made processors more susceptible to transient faults that can corrupt
data and make systems unavailable. Designers often compensate for
transient faults by adding hardware redundancy and making circuit-
and process-level adjustments. However, applications have differ-
ent data integrity and availability demands, which make hardware

  

Source: August, David - Department of Computer Science, Princeton University

 

Collections: Computer Technologies and Information Sciences