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Circuit-Aware Architectural Simulation Seokwoo Lee, Shidhartha Das, Valeria Bertacco, Todd Austin
 

Summary: Circuit-Aware Architectural Simulation
Seokwoo Lee, Shidhartha Das, Valeria Bertacco, Todd Austin
David Blaauw, and Trevor Mudge
Advanced Computer Architecture Lab
The University of Michigan
1301 Beal Ave, Ann Arbor, MI 48109
razor@eecs.umich.edu
ABSTRACT
Architectural simulation has achieved a prominent role in
the system design cycle by providing designers the ability
to quickly examine a wide variety of design choices. How-
ever, the recent trend in system design toward architectures
that react to circuit-level phenomena has outstripped the
capabilities of traditional cycle-based architectural simula-
tors. In this paper, we present an architectural simulator
design that incorporates a circuit modeling capability, per-
mitting architectural-level simulations that react to circuit
characteristics (such as latency, energy, or current draw) on
a cycle-by-cycle basis. While these additional capabilities
slow simulation speed, we show that the careful application

  

Source: Austin, Todd M. - Department of Electrical Engineering and Computer Science, University of Michigan
Bertacco, Valeria - Department of Electrical Engineering and Computer Science, University of Michigan

 

Collections: Computer Technologies and Information Sciences; Engineering