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Summary: AN ALGORITHM FOR THE VERIFICATION OF TIMING DIAGRAMS
REALIZABILITY
Abdelhalim El-Aboudi, El-Mostapha Aboulhamid
Laboratoire LASSO, Département IRO,
Université de Montréal, Montréal (Qc), CANADA
Abstract
In this paper, we present a new method for verifying the
realizability of a timing diagram with linear timing con-
straints, thus ensuring that the implementation of the
underlying interface is feasible. The method is based on
the consistency of the timing constraints derived from the
timing diagram and accepts unknown occurrence times for
events produced by the environment.
Keywords
Timing diagrams, timing constraints, consistency, realiz-
ability.
1. Introduction
Many applications in microelectronic design systems
require the adequate elaboration of interfaces between
communicating parts especially in an environments of
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